[P4-dev] General question on P4

Nate Foster jnfoster at cs.cornell.edu
Thu Apr 6 01:01:44 EDT 2017


Your question seems to be more about the relative merits of various
architectures than the P4 language. But yes an ASIC is generally more
efficient than an NPU, at least at scale.

Beyond efficiency there are other benefits to expressing a data plane
algorithm in an open framework like P4. For example, a P4 programs should
be relatively easy to port to a different target. The same is unlikely to
be true for C programs written against closed SDKs.

-N

On Wed, Apr 5, 2017 at 6:59 PM, Michael Borokhovich <michaelbor at gmail.com>
wrote:

> Hi,
>
> P4 allows for configurable data-plane, e.g., we can easily support new
> custom protocols. However, the same functionality may be achieved by using
> a network processor, e.g., EZchip (the one I had experience with).
>
> As I understand, the advantages of programmable ASIC/FPGA that supports P4
> is better performance and a lower price than a network processor?
>
> What do you think?
>
> Thanks!
> Michael.
>
>
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> P4-dev at lists.p4.org
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>
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