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Communication between clone packet and original packet

SG
Sahil Gupta
Tue, Feb 23, 2021 4:01 AM

Hi all,
Assume I compute some function on a cloned copy of the packet in egress
block and want to communicate results to the original packet. Any way to
pass this information without using a register?
One way is to store the result in a register at an index common for both
cloned and original packets.
But is there any other way to send the result directly to the original copy
of the packet?

Regards
Sahil Gupta

Hi all, Assume I compute some function on a cloned copy of the packet in egress block and want to communicate results to the original packet. Any way to pass this information without using a register? One way is to store the result in a register at an index common for both cloned and original packets. But is there any other way to send the result directly to the original copy of the packet? Regards Sahil Gupta
AF
Andy Fingerhut
Tue, Feb 23, 2021 6:25 AM

There is no guarantee that a clone will be processed before the original
packet is complete -- it definitely might not begin processing until after
the original has finished processing and left the switch.

It is also possible that the clone is processed first, and the original
later.  I do not know of any switch architectures that let you control the
order deterministically.

Andy

On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta sg5414@rit.edu wrote:

Hi all,
Assume I compute some function on a cloned copy of the packet in egress
block and want to communicate results to the original packet. Any way to
pass this information without using a register?
One way is to store the result in a register at an index common for both
cloned and original packets.
But is there any other way to send the result directly to the original
copy of the packet?

Regards
Sahil Gupta


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To unsubscribe send an email to p4-dev-leave@lists.p4.org
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There is no guarantee that a clone will be processed before the original packet is complete -- it definitely might not begin processing until after the original has finished processing and left the switch. It is also possible that the clone is processed first, and the original later. I do not know of any switch architectures that let you control the order deterministically. Andy On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta <sg5414@rit.edu> wrote: > Hi all, > Assume I compute some function on a cloned copy of the packet in egress > block and want to communicate results to the original packet. Any way to > pass this information without using a register? > One way is to store the result in a register at an index common for both > cloned and original packets. > But is there any other way to send the result directly to the original > copy of the packet? > > Regards > Sahil Gupta > > _______________________________________________ > P4-dev mailing list -- p4-dev@lists.p4.org > To unsubscribe send an email to p4-dev-leave@lists.p4.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
SG
Sahil Gupta
Tue, Feb 23, 2021 2:00 PM

Follow up question.

Does any switch architecture implement programmable buffers [1] concept
introduced at SOSR' 18? Anyone working on it to make it reality for real P4
switches?

Reference:
[1] https://dl.acm.org/doi/10.1145/3185467.3185473

On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut andy.fingerhut@gmail.com
wrote:

There is no guarantee that a clone will be processed before the original
packet is complete -- it definitely might not begin processing until after
the original has finished processing and left the switch.

It is also possible that the clone is processed first, and the original
later.  I do not know of any switch architectures that let you control the
order deterministically.

Andy

On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta sg5414@rit.edu wrote:

Hi all,
Assume I compute some function on a cloned copy of the packet in egress
block and want to communicate results to the original packet. Any way to
pass this information without using a register?
One way is to store the result in a register at an index common for both
cloned and original packets.
But is there any other way to send the result directly to the original
copy of the packet?

Regards
Sahil Gupta


P4-dev mailing list -- p4-dev@lists.p4.org
To unsubscribe send an email to p4-dev-leave@lists.p4.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

Follow up question. Does any switch architecture implement programmable buffers [1] concept introduced at SOSR' 18? Anyone working on it to make it reality for real P4 switches? Reference: [1] https://dl.acm.org/doi/10.1145/3185467.3185473 On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut <andy.fingerhut@gmail.com> wrote: > There is no guarantee that a clone will be processed before the original > packet is complete -- it definitely might not begin processing until after > the original has finished processing and left the switch. > > It is also possible that the clone is processed first, and the original > later. I do not know of any switch architectures that let you control the > order deterministically. > > Andy > > On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta <sg5414@rit.edu> wrote: > >> Hi all, >> Assume I compute some function on a cloned copy of the packet in egress >> block and want to communicate results to the original packet. Any way to >> pass this information without using a register? >> One way is to store the result in a register at an index common for both >> cloned and original packets. >> But is there any other way to send the result directly to the original >> copy of the packet? >> >> Regards >> Sahil Gupta >> >> _______________________________________________ >> P4-dev mailing list -- p4-dev@lists.p4.org >> To unsubscribe send an email to p4-dev-leave@lists.p4.org >> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > >
H
hemant@mnkcg.com
Tue, Feb 23, 2021 2:46 PM

The 5G requirement to buffer packets asks up to 65K packets to buffer.  There
is no switching asic that will buffer so many packets.

Hemant

From: Sahil Gupta sg5414@rit.edu
Sent: Tuesday, February 23, 2021 9:00 AM
To: Andy Fingerhut andy.fingerhut@gmail.com
Cc: p4-dev p4-dev@lists.p4.org
Subject: [P4-dev] Re: Communication between clone packet and original packet

Follow up question.

Does any switch architecture implement programmable buffers [1] concept
introduced at SOSR' 18? Anyone working on it to make it reality for real P4
switches?

Reference:

[1] https://dl.acm.org/doi/10.1145/3185467.3185473

On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut <andy.fingerhut@gmail.com
mailto:andy.fingerhut@gmail.com > wrote:

There is no guarantee that a clone will be processed before the original
packet is complete -- it definitely might not begin processing until after the
original has finished processing and left the switch.

It is also possible that the clone is processed first, and the original later.
I do not know of any switch architectures that let you control the order
deterministically.

Andy

On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta <sg5414@rit.edu
mailto:sg5414@rit.edu > wrote:

Hi all,

Assume I compute some function on a cloned copy of the packet in egress block
and want to communicate results to the original packet. Any way to pass this
information without using a register?

One way is to store the result in a register at an index common for both
cloned and original packets.

But is there any other way to send the result directly to the original copy of
the packet?

Regards

Sahil Gupta


P4-dev mailing list -- p4-dev@lists.p4.org mailto:p4-dev@lists.p4.org
To unsubscribe send an email to p4-dev-leave@lists.p4.org
mailto:p4-dev-leave@lists.p4.org
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The 5G requirement to buffer packets asks up to 65K packets to buffer. There is no switching asic that will buffer so many packets. Hemant From: Sahil Gupta <sg5414@rit.edu> Sent: Tuesday, February 23, 2021 9:00 AM To: Andy Fingerhut <andy.fingerhut@gmail.com> Cc: p4-dev <p4-dev@lists.p4.org> Subject: [P4-dev] Re: Communication between clone packet and original packet Follow up question. Does any switch architecture implement programmable buffers [1] concept introduced at SOSR' 18? Anyone working on it to make it reality for real P4 switches? Reference: [1] https://dl.acm.org/doi/10.1145/3185467.3185473 On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut <andy.fingerhut@gmail.com <mailto:andy.fingerhut@gmail.com> > wrote: There is no guarantee that a clone will be processed before the original packet is complete -- it definitely might not begin processing until after the original has finished processing and left the switch. It is also possible that the clone is processed first, and the original later. I do not know of any switch architectures that let you control the order deterministically. Andy On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta <sg5414@rit.edu <mailto:sg5414@rit.edu> > wrote: Hi all, Assume I compute some function on a cloned copy of the packet in egress block and want to communicate results to the original packet. Any way to pass this information without using a register? One way is to store the result in a register at an index common for both cloned and original packets. But is there any other way to send the result directly to the original copy of the packet? Regards Sahil Gupta _______________________________________________ P4-dev mailing list -- p4-dev@lists.p4.org <mailto:p4-dev@lists.p4.org> To unsubscribe send an email to p4-dev-leave@lists.p4.org <mailto:p4-dev-leave@lists.p4.org> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
AF
Andy Fingerhut
Tue, Feb 23, 2021 8:10 PM

I am not aware of anyone working to make that particular proposal a reality
for P4-programmable switch ASICs.

Even the open source Github repository linked in that paper (reference
[14]) that the authors created appears not to exist.

As they mention in the paper, you could implement this in a host attached
to a P4-programmable switch ASIC via one or more Ethernet ports, with
whatever price/power/performance ratio that one can achieve there.

Andy

On Tue, Feb 23, 2021 at 6:00 AM Sahil Gupta sg5414@rit.edu wrote:

Follow up question.

Does any switch architecture implement programmable buffers [1] concept
introduced at SOSR' 18? Anyone working on it to make it reality for real P4
switches?

Reference:
[1] https://dl.acm.org/doi/10.1145/3185467.3185473

On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut andy.fingerhut@gmail.com
wrote:

There is no guarantee that a clone will be processed before the original
packet is complete -- it definitely might not begin processing until after
the original has finished processing and left the switch.

It is also possible that the clone is processed first, and the original
later.  I do not know of any switch architectures that let you control the
order deterministically.

Andy

On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta sg5414@rit.edu wrote:

Hi all,
Assume I compute some function on a cloned copy of the packet in egress
block and want to communicate results to the original packet. Any way to
pass this information without using a register?
One way is to store the result in a register at an index common for both
cloned and original packets.
But is there any other way to send the result directly to the original
copy of the packet?

Regards
Sahil Gupta


P4-dev mailing list -- p4-dev@lists.p4.org
To unsubscribe send an email to p4-dev-leave@lists.p4.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

I am not aware of anyone working to make that particular proposal a reality for P4-programmable switch ASICs. Even the open source Github repository linked in that paper (reference [14]) that the authors created appears not to exist. As they mention in the paper, you could implement this in a host attached to a P4-programmable switch ASIC via one or more Ethernet ports, with whatever price/power/performance ratio that one can achieve there. Andy On Tue, Feb 23, 2021 at 6:00 AM Sahil Gupta <sg5414@rit.edu> wrote: > Follow up question. > > Does any switch architecture implement programmable buffers [1] concept > introduced at SOSR' 18? Anyone working on it to make it reality for real P4 > switches? > > Reference: > [1] https://dl.acm.org/doi/10.1145/3185467.3185473 > > > > On Tue, Feb 23, 2021, 1:26 AM Andy Fingerhut <andy.fingerhut@gmail.com> > wrote: > >> There is no guarantee that a clone will be processed before the original >> packet is complete -- it definitely might not begin processing until after >> the original has finished processing and left the switch. >> >> It is also possible that the clone is processed first, and the original >> later. I do not know of any switch architectures that let you control the >> order deterministically. >> >> Andy >> >> On Mon, Feb 22, 2021 at 8:01 PM Sahil Gupta <sg5414@rit.edu> wrote: >> >>> Hi all, >>> Assume I compute some function on a cloned copy of the packet in egress >>> block and want to communicate results to the original packet. Any way to >>> pass this information without using a register? >>> One way is to store the result in a register at an index common for both >>> cloned and original packets. >>> But is there any other way to send the result directly to the original >>> copy of the packet? >>> >>> Regards >>> Sahil Gupta >>> >>> _______________________________________________ >>> P4-dev mailing list -- p4-dev@lists.p4.org >>> To unsubscribe send an email to p4-dev-leave@lists.p4.org >>> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s >> >>